Low-profile semiconductor assemblies are in high demand. In response to the high demand, semiconductor assemblies have been developed that include chips coupled to substrates using low-profile interconnections. For example, the low-profile interconnections may comprise solder bumps that provide an electric path between the chip and the substrate.
However, the solder bumps may suffer from stress caused by relative movement between the chip and base substrate. As a result, the solder bumps and assembly may suffer from reliability problems. For example, the substrate and the chip may have a different coefficient of thermal expansion (CTE). The stress caused by the different CTEs may cause the solder bumps to crack. A material referred to as underfill may be applied between the chip and the substrate to reinforce the mechanical strength of the assembly. However, it may be difficult to apply underfill material between the chip and the substrate, especially in low-profile semiconductor assemblies where chips are vertically stacked.